Why We Invested in Mixx Technologies

Tina Tosukhowong and Dante Zakhidov | TDK Ventures Overview A core aspect of our meta-thesis in the semiconductor sector is that venture investments must strike a very fine line between innovation and industry compatibility. Given the enormity and interdependence of the semiconductor industry, technologies orthogonal to the supply chain are at high risk of faltering […]

Tina Tosukhowong and Dante Zakhidov | TDK Ventures

Overview
A core aspect of our meta-thesis in the semiconductor sector is that venture investments must strike a very fine line between innovation and industry compatibility. Given the enormity and interdependence of the semiconductor industry, technologies orthogonal to the supply chain are at high risk of faltering due to market forces and industrial conservatism, regardless of technological advantage. That is why we were impressed when we met Vivek Raghuraman and Rebecca Schaevitz of Mixx Technologies, and they pitched us a “blend of innovation and industry compatibility” as their strategy, with “reliability and scalability” as their central tenets. As we learned more about their pragmatic vision and the battle scars they earned to back it up, we were excited to invest in their optical engine solution. Vivek and Rebecca have previously built and successfully commercialized co-packaged optics (CPO) as the founding team members of Broadcom Bailly CPO. Their incredible journey has given them the perspective and the knowledge to deliver a competitive solution at Mixx Technologies.

Mixx Technologies is a 2023-founded San Jose-based startup developing an optical interconnect solution within the co-packaged optics megatrend for the next generation of highly parallelized scale-up AI hardware.

Why Parallelization and Why Interconnects?

As the size of modern AI models has grown exponentially from millions to trillions of parameters, parallelization has become the defining strategy for scaling across software and hardware [1-3]. The mathematics of AI requires large matrix multiplications and vector operations, which can be broken into identical, independent arithmetic tasks to be computed simultaneously. Hardware accelerators like GPUs can perform these computations in parallel very efficiently, significantly reducing the time required for AI training and inference.

In addition to speed, parallelization offers the dual benefit of relieving capacity constraints. In the early era of AI, when models were smaller, a single GPU could contain the entire model. However, as the model grew beyond the memory capacity of a single chip (10B+ parameters), the industry was forced to split models across multiple interconnected GPUs. This approach, connecting multiple GPUs to act as one large logical accelerator, is what defines modern scale-up networking.

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Figure 1. Scale-up networking depicted as an all-to-all architecture between GPUs within a datacenter rack. Scale-out networking connects many scale-up domains within the datacenter floor via other network topologies, such as a leaf-spine architecture.

Nvidia is the current global leader in the scale-up networking domain with their NVL72 rack-level solution, connecting 72 Blackwell GPUs via an all-to-all networking fabric to function like one giant GPU [4]. As the industry continues to push toward AI with greater reasoning capabilities, the need for larger scale-up networking clusters allowing 100s or 1000s of GPUs to connect has never been greater. However, as parallelization increases, the additional time necessary to communicate between more GPUs can begin to outweigh the speed-up from compute [5].

This tension between parallelization and communication latency in AI clusters is running headfirst into the lagging technological development of interconnect technologies. In the performance scaling graph in Figure 2a, we see that the advances in memory (green) and interconnect (blue) technologies have not kept pace with processor performance (black) [6]. This limits the ability to efficiently parallelize AI hardware, with Meta reporting that their AI servers sit idle for 30% of the time on average while waiting for data to move across the network [7]. The rapid economic expansion of the AI industry is creating a massive market force to upgrade these technologies.

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Figure 2. a) Comparison of the normalized scaling metric for compute (black), memory (green), and interconnects (blue) over time [6]. b) Meta’s 2022 analysis of GPU idle time during training across 4 different models [7].

Moving from Copper to Optical Interconnects for Scale-Up Clusters

Copper interconnects are the current technology of choice for scale-up clusters like Nvidia’s NVL72 (Figure 3a). These copper wires can transmit information at 200 Gigabits per second (Gbps) but only up to a few meters. These data rates are at the limit of what copper can transmit, running into physical phenomena such as skin effect and dielectric loss, which greatly attenuate the signal and reduce the interconnects’ reach to a few meters. This, in turn, limits the total number of connected GPUs as the cables are literally not long enough to reach additional GPUs. This is called the copper wall and limits cluster size expansion in both speed and reach.

The need for greater parallelization in AI clusters, coupled with the demand for higher bandwidth, higher reach, and lower energy consumption interconnects is catalyzing the transition from copper to optical interconnects. The leading solution is to switch to optical interconnects as part of a technological transition dubbed “co-packaged optics”.

Understanding Co-Packaged Optics (CPO)

CPO not only enables higher interconnect data rates with longer reach (1000+ meters), but it can also significantly lower the power consumption. Just as importantly, it provides technology scaling pathways that enable multiple generations of improvements with decreasing cost curves. The overarching goal is to replace copper and bring optics closer to the processors (GPUs, ASICs, etc).

While optical interconnects have existed in datacenters since the 1990s, serving as the highway for internet traffic within datacenters (scale-out networking) and between datacenters (telecom networking), they have been too technically challenging to implement, and hence too expensive, to displace copper interconnects in scale-up networking.

The current generation of optical interconnect technologies is based on fiber optic cables coupled to pluggable optical transceivers (Figure 3b). The transceiver consists of a transmitter, a receiver, and control electronics that orchestrate the conversion of data between the electrical and optical domains. However, with the anticipated shift to CPO, the industry will need to change how it buys and sells optical interconnects. For the leading technological directions, the optical transceiver product is evolving and splitting into an integrated optical engine (OE) and external laser light source (Figure 3c). The optical engine will be integrated onto the substrate next to the chip, removing long traces of copper. The optical engine integrates the control electronics, transmitter modulator, and receiver photodetector. Because of the thermal sensitivity of laser light sources, the industry has decided to take the light source out of the transmitter and make it a standalone product [8].

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Figure 3. Comparison of current vs future scale-up rack architectures. a) GPUs are connected between the levels of the rack via copper interconnects. b) Pluggable optical interconnects (transceiver + fiber cable) are used alongside copper interconnects in today’s scale-out switches to connect racks together. c) Future scale-up architectures will minimize copper in favor of optical interconnects. The optical interconnect is now defined as the optical engine (OE) + light source + fiber cable. The optical engine is integrated on the substrate next to the processor. d) Scale-out switches fully based on optical interconnects which have been announced by Broadcom, Nvidia, Marvell, and others.

CPO: Scorecard for King of the Hill

As promising as CPO is as a technology, it also represents a monumental shift for the industry, which will require significant change along every step of the value chain. While CPO has already begun to roll out for scale-out networking (Figure 3d), industry experts anticipate that CPO interconnects for scale-up networking will be seen in volume between 2028–2030, reaching a multi-billion-dollar market size, driven by hyperscalers leveraging them for AI datacenters [9]. To be ready for such a transition, the industry will need a system-level solution co-designed from the ground up.

From our past deep explorations on AI Datacenter Networking and Photonic Light Sources for AI Datacom, we have developed our own internal set of KPIs for CPO startups to help identify a “King of the Hill”. They are:

  • For a start-up to compete with incumbents in a highly competitive vertical, they will need to correctly time the CPO technological transition with strong product-market fit. The start-up should show timelines for sample-A and sample B validation orders in 2026–27 to secure a design win in time for the 2028–30 CPO inflection.
  • The technology must deliver high beachfront bandwidth density (>1 Tb/s/mm) and energy efficiency on par with or better than copper (<5 pJ/bit). It must operate reliably across the wider temperature ranges demanded by modern racks and integrate cleanly with standard die-to-die fabrics such as UCIe [9–11]. The technology should follow an external laser strategy compliant with industry direction.
  • They must have a credible path to lower costs to <$0.20/Gb by volume deployment. That demands a mature manufacturing flow with excellent assembly yields and designs that don’t trade technical elegance for supply-chain fragility.
  • Finally, the team must be seasoned at turning advanced R&D into qualified products with deep engagement traction with tier-one customers and investors who understand the timeline and capital intensity of bringing CPO to volume.

Mixx Technologies: CPO Optical Engine Designed from a System Perspective

Amongst the start-ups in the CPO landscape, Mixx Technologies and its world-class team differentiated themselves through outstanding creativity and unmatched experience. TDK Ventures’ successful investment in Nubis Communications (acquired by Cienna) played a significant role in paving the way for our investment in Mixx. The strength of Nubis Communications reinforced to us the importance of a high-quality team with industry expertise who can build credibility and close partnerships.

Vivek and Rebecca have a storied career in the semiconductor photonics industry. Vivek was part of the Intel silicon photonics team that built the first integrated optical transceiver. Rebecca was a leader in optical technology strategy for datacenters at Corning, the dominant player in fiber-optic cables and subassemblies. They met in Rockley Photonics, where they helped build the world’s first CPO prototype. When Rockley Photonics pivoted from optical communications to wearables, Vivek and Rebecca transitioned to Broadcom as part of aquihiring. It was there that Vivek, alongside Alexis Black and Karl Muth, convinced Hock Tan in 2019 to fund the successful Broadcom CPO program [10]. As founding team members, Vivek and Rebecca were leaders in the CPO journey that led to two generations of scale-out CPO products that culminated in successful demonstrations of CPO reliability and scalability with Meta [11]. This decade-long story arc from development to commercialization of technologies in optical communications has given them a holistic perspective on what it takes to succeed in CPO.

Mixx Technologies was founded in 2023, with its headquarters in San Jose and regional operations developing in India and Taiwan. The company’s main product is an optical engine component to be co-designed into a scale-up AI rack solution. Mixx’s optical engine is designed from a top-down system-level approach to provide a CPO reference design that offers flexibility for network design by datacenter architects. This includes how the optical engine is integrated into the full package, interoperability with the ASIC, the fiber attachment solution, and the thermal and cable management within the server blade. On raw metrics, Mixx’s optical engine is exceeding our established KPIs while also introducing an entirely new KPI that we hadn’t considered — radix.

Vivek and Rebecca realized that to enable larger parallelized AI clusters, they needed to significantly increase the radix, or the number of fibers coming out of the optical engine. This is an extremely challenging problem and one that the industry has shied away from. The fiber attach is one of the most expensive steps of optical interconnect assembly due to the need for active alignment, with every additional fiber attach decreasing the yield and compounding the cost. With their seed round, they tackled the fiber attach component and significantly increased the radix while managing costs through a scalable and reliable passive attach approach. This enables large switchless clusters to flatten the network topology and reduce latency.

The switchless cluster not only unlocks a new scale-up topology that falls within the current datacenter schema but also provides AI system architects with greater flexibility in how they design their systems for their specific performance needs.

Why We Invested

TDK Ventures’ investment in Mixx Technologies reflects our two companies’ shared vision of addressing bottlenecks in data and connectivity for AI technologies. Mixx has differentiated itself not only by technical performance — exceeding our King of the Hill KPIs — but also by its world-class team, which is a trailblazer in CPOs. We are humbly proud to be a small part of the Mixx Technologies innovation journey.

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Figure 4. Mixx Technologies visiting the TDK Ventures offices in San Jose

References

[1] A. Krizhevsky, I. Sutskever, and G. E. Hinton, “ImageNet Classification with Deep Convolutional Neural Networks,” in Advances in Neural Information Processing Systems (NeurIPS), vol. 25, 2012, pp. 1097–1105.

[2] J. Dean et al., “Large Scale Distributed Deep Networks,” in Advances in Neural Information Processing Systems (NeurIPS), vol. 25, 2012, pp. 1223–1231.

[3] A. Vaswani et al., “Attention Is All You Need,” in Advances in Neural Information Processing Systems (NeurIPS), vol. 30, 2017, pp. 5998–6008.

[4] NVIDIA, “NVIDIA Contributes GB200 NVL72 Designs to Open Compute Project,” NVIDIA Technical Blog, Oct. 15, 2024. [Online]. Available: https://developer.nvidia.com/blog/nvidia-contributes-nvidia-gb200-nvl72-designs-to-open-compute-project/

[5] M. Shoeybi, M. Patwary, R. Puri, P. LeGresley, J. Casper, and B. Catanzaro, “Megatron-LM: Training Multi-Billion Parameter Language Models Using Model Parallelism,” arXiv preprint arXiv:1909.08053, 2019.

[6] A. Gholami et al., “AI and the Memory Wall,” Berkeley Institute for Performance and Design, Tech. Rep., 2024. [Online]. Available: https://research.google/blog/ai-and-the-memory-wall/ (Updated version of the 2021/2024 analysis).

[7] A. Bjorlin, “Infrastructure for Large Scale AI: Empowering Open,” Keynote presented at the OCP Global Summit, San Jose, CA, Oct. 2022.

[8] OIF, “OIF Announces External Laser Small Form-Factor Pluggable (ELSFP) Implementation Agreement,” OIF Press Release, Aug. 8, 2023. [Online]. Available: https://www.oiforum.com/oif-announces-external-laser-small-form-factor-pluggable-elsfp-implementation-agreement-paving-the-way-for-advancements-in-co-packaged-optics-applications/

[9] S. Cass, “Nvidia and Broadcom unveil co-packaged-optics network switches,” IEEE Spectrum, Mar. 25, 2025. [Online]. Available: https://spectrum.ieee.org/co-packaged-optics

[10] “ECOC 2025 Industry Reflections — Part 3 of 4,” Gazettabyte, Oct. 2025. [Online]. Available: https://www.gazettabyte.com/home/2025/10/ecoc-2025-industry-reflections-part-3-of-4.html

[11] Broadcom, “Broadcom Showcases Industry-Leading Quality and Reliability of Co-Packaged Optics,” Broadcom Newsroom, Mar. 20, 2024. [Online]. Available: https://www.broadcom.com/company/news/product-releases/61286

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